In semiconductor industries, the production of integrated circuits (ICs) mainly includes three steps: manufacturing a wafer, manufacturing integrated circuits and packaging the integrated circuits. A bare chip is formed after the steps of wafer manufacturing, circuit designing, mask manufacturing and wafer dicing. Each bare chip formed from dicing the wafer is electrically connected to an external signal through connecting points on each bare chip, and then the bare chip is encapsulated by a molding material. The purpose of the package is to prevent the bare chip from being damaged by humidity, heat and noise signals, and to provide the bare chip with an electrically connecting medium for electrically connecting the chip to an external circuit. As a result, the package step of the integrated circuit is completed.
A semiconductor package is a molded plastic or ceramic casing inside which is embedded one or more discrete or integrated electronic components connected and used within an electronic circuit. The discrete components are typically etched in silicon wafer before being cut and assembled in a package.
FIG. 1A illustrates a cross-sectional view of a conventional chip package. The conventional chip package 100 comprises a package substrate 110, a chip 120, a silver epoxy layer 130, a plurality of wires 140, molding glue 150 and a conductive layer 160. The chip 120 is disposed on a carrying surface 112 of the package substrate 110. The silver epoxy layer 130 is disposed on the conductive layer 160, and both are disposed between the chip 120 and the carrying surface 112 to adhere the chip 120 onto the carrying surface 112 of the package substrate 110 and electrically connect the signal from chip 120 to the outside. It is known from the illustration in FIG. 1A that the chip 120 and the package substrate 110 are electrically connected to each other by the wires 140, i.e. the chip 120 and the package substrate 110 are connected by wire bonding. The molding glue 150 is to encapsulate and protect the wires 140 and to prevent the portion of surfaces of the chip 120 exposing.
A known conventional package process has several steps including die sawing, die mounting, wire bonding, molding, trimming/forming, marking, plating and inspection. In the production of the conventional chip package 100, each layer of the structure mentioned above is produced by a step.
FIG. 1B illustrates a diagram of the production of the conventional chip package. The first step of the conventional chip package 100, generally, a silicon substrate 170 and a plurality of chips 120 are provided. In the next step, the chips 120 are adhered to silicon substrate 110 by a conductive paste or adhesive tape. Then, a filling layer 180 can be formed on top of the silicon substrate 110 surrounding the peripheral of chips 120 to fill the gap between chips 120. The height of filling layer 180 should be approximately equal to the height of chips 120. At this step, the step of die bonding is already done.
After the above steps, a dielectric layer 142 is deposited on top of the filling layer 180 and chips 120, and then the dielectric layer 142 is patterned according to metal pads 126 on dies 120 to form thru-holes 142a. A silver epoxy layer 130, a conductive layer 160 and the substrate 110 are formed in sequence. A plurality of bonding points 190 are on bonding pads 142a. Finally, the silicon substrate 170 is released, and then the dicing is sawed.
However, the production of the conventional chip package has a complicated process and consumes much time and cost.